Rockpi 4B 1GB not booting
Description
Environment
None
Checklist
hideActivity
Show:
Igor Pecovnik December 27, 2020 at 9:31 AMEdited
OK. I hope we are not loosing some other function … Thanks.
Piotr Szczepanik December 27, 2020 at 9:26 AM
Yup, we did… but I managed to break if again cycling through different u-boot options with SPI boot functionality.
Igor Pecovnik December 26, 2020 at 11:30 PM
Didn’t we fix this problem once?
Done
Details
Details
Assignee
Piotr Szczepanik
Piotr SzczepanikReporter
Igor Pecovnik
Igor PecovnikComponents
Fix versions
Affects versions
Priority
Created December 26, 2020 at 11:29 PM
Updated August 30, 2022 at 3:45 PM
Resolved December 27, 2020 at 9:31 AM
DDR Version 1.24 20191016 In channel 0 CS = 0 MR0=0x19 MR4=0x3 MR5=0x6 MR8=0x0 MR12=0x72 MR14=0x72 MR18=0x0 MR19=0x0 MR24=0x8 MR25=0xFF channel 1 CS = 0 MR0=0x19 MR4=0x3 MR5=0x6 MR8=0x0 MR12=0x72 MR14=0x72 MR18=0x0 MR19=0x0 MR24=0x8 MR25=0xFF channel 0 training pass! channel 1 training pass! change freq to 416MHz 0,1 Channel 0: LPDDR4,416MHz Bus Width=32 Col=10 Bank=8 Row=14 CS=1 Die Bus-Width=16 Size=512MB Channel 1: LPDDR4,416MHz Bus Width=32 Col=10 Bank=8 Row=14 CS=1 Die Bus-Width=16 Size=512MB 256B stride channel 0 CS = 0 MR0=0x19 MR4=0x3 MR5=0x6 MR8=0x0 MR12=0x72 MR14=0x72 MR18=0x0 MR19=0x0 MR24=0x8 MR25=0xFF channel 1 CS = 0 MR0=0x19 MR4=0x3 MR5=0x6 MR8=0x0 MR12=0x72 MR14=0x72 MR18=0x0 MR19=0x0 MR24=0x8 MR25=0xFF channel 0 training pass! channel 1 training pass! channel 0, cs 0, advanced training done